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DAVID Conference Presentations
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EPTC2008
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"Vacuum Encapsulation of Resonant MEMS Sensors by Direct Chip-to-Wafer Stacking on ASIC" - Presentation at the 10th Electronics Packaging Technology Conference, 9-12 December 2008 (Singapore)
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Smart Systems Integration 2008
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"Hybrid Chip-Scale Integration of Inertial MEMS by Chip-to-Wafer Vacuum Bonding" - Oral Presentation at SMART SYSTEMS INTEGRATION conference, Barcelona (9-10 April 2008)
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MicroNanoReliability Congress 2007
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"TSV constraints related to temperature excursion, pressure during moulding and materials used" - Presentation of FEM studies on Through-Silicon Via design and process constraints related to package molding by T. Fałat and K. Friedel from Wrocław University of Technology, Poland - Sept. 2-5, 2007 (Berlin, Germany)
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EMPC2007
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"DAVID - a strategic research project for chip-scale MEMS / ASIC co-integration" - Presentation of project objectives and progress at IMAPS "European Microelectronics and Packaging Conference and Exhibition" on June 17-20, 2007 (Oulu, Finland)
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DTIP2007
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"Interconnect Challenges in Highly Integrated MEMS/ASIC Subsystems" - Presentation of DAVID's approach related to critical issues in 3D interconnect technologies in Chip-Scale System-in-Package (CSSiP) at the Symposium "Design, Test, Integration and Packaging of MEMS/MOEMS" on April 25-27, 2007 (Stresa, Italy)
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Smart Systems Integration 2007
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Poster Presentation of the DAVID project at the SMART SYSTEMS INTEGRATION conference, Paris (27-28 March 2007)
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EPTC2006
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"Design Rules for Post-CMOS Through-Silicon Vias in an Industrial Environment" - Presentation at the 8th Electronics Packaging Technology Conference, 6-8 December 2006 (Pan Pacific Hotel, Singapore)
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