It seems evident that the next step in SiP integration of MEMS and ASIC is a direct interconnect between both. While waferbonding is generally the preferred approach with clear efficiency advantages, the "Chip-to-Wafer" approach deserves a closer look if one is interested in medium-scale production and heterogeneous supply chains. Fraunhofer ISIT and Datacon Technology want to present some of the related technical challenges that they encountered in their studies on the subject.