Visions & Objectives

The DAVID project targets to provide an extremely high packaging density for hybrid integration of MEMS with ASICs. A significant reduction of assembly and packaging costs, specifically for consumer applications, shall be reached by the integration approach itself, but also by a lithographic size reduction of micromachined structures. The benefit becomes most visible when several sensors are clustered in a single, hermetic encapsulation on wafer level.

Beyond this, a "3D-SiP" approach can improve product quality by reducing parasitic effects: DAVID's extremely short interconnects are particularly interesting for capacitive or high-frequency signals.

The project is designed to demonstrate a complete process flow with the following technology components:

• vertical interconnect by post-CMOS feedthroughs
• handling, assembly and waferlevel bonding of singulated, open MEMS devices on a CMOS wafer
• vacuum sealing and fine structured getter films to control the sensor cavity ambient
• waferlevel molding and solder balling to build a chip-scale MEMS-SiP.

Critical aspect like mechanical drift and offset effects of package stress are addressed by the implementation of a test vehicle that allows to measure and correlate them with FEM simulations. A control of design and material suitability is therefore given through all process stages.

The DAVID project was supported with 2.8 M€ funding by the European Commission under the Sixth Framework Programme, Priority IST-2004-2.4.2: “Technologies and Devices for Micro-/Nano-Scale Integration”. The total cost was above 5.3 M€ over a duration of 3,5 years (contract number IST-027240 from 1.1.2006 to 30.06.2008, including a 6 months extension period).